Functional verification of circuit designs sometimes involves emulation using field programmable gate arrays (FPGAs). Stacked silicon interconnect (SSI) technology, supports emulation of a very large range of circuit designs. Stacked Silicon Interconnect (SSI) technology involves two or more integrated circuit (IC) dies mounted on a silicon interposer and communicatively coupled via signal lines in the silicon interposer.
In a specific example involving programmable logic, such as field programmable gate arrays, SSI technology combines multiple “super logic region” (SLR) components mounted on a passive silicon interposer. Compared to traditional devices, SSI technology enables construction of FPGA devices that are much larger, have more dedicated features, and have a lower power envelope than single-chip implementations.
An SLR is a single FPGA die contained in an SSI-based device. Each SLR can include the active circuitry common to most FPGA devices. This circuitry includes large numbers of look-up tables (LUTs), registers, input/output (I/O) components, gigabit transceivers (GTs), block memory (BRAM), and digital signal processing (DSP) circuits. Multiple SLRs can be assembled to make an SSI-based device.